root/lm-sensors/trunk/doc/busses/i2c-i801 @ 4946

Revision 4946, 3.0 KB (checked in by khali, 7 years ago)

Add support for the Intel Tolapai to i2c-i801. This is a backport from
Linux 2.6, original patch by Jason Gaston.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
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1Kernel driver `i2c-i801.o'
2
3Status: Tested and stable.
4        Block reads/writes lightly tested.
5        HW PEC support Beta.
6        I2C Block Read support Beta.
7
8Supported adapters:
9  * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
10    '810' and '810E' chipsets)
11  * Intel 82801BA (ICH2 - part of the '815E' chipset)
12  * Intel 82801CA/CAM (ICH3)
13  * Intel 82801DB (ICH4)
14  * Intel 82801EB/ER (ICH5)
15  * Intel 6300ESB/ESB2
16  * Intel 82801FB/FR/FW/FRW (ICH6)
17  * Intel ICH7/ICH8/ICH9
18  * Intel Tolapai
19    Datasheets: Publicly available at the Intel website
20
21Authors: Frodo Looijaard <frodol@dds.nl>, Philip Edelbrock
22         <phil@netroedge.com>, and Mark Studebaker <mdsxyz123@yahoo.com>
23
24
25Module Parameters
26-----------------
27
28* force_addr: int
29  Forcibly enable the ICH at the given address. EXTREMELY DANGEROUS!
30
31
32Description
33-----------
34
35The ICH (properly known as the 82801AA), ICH0 (82801AB),
36ICH2 (82801BA), ICH3 (82801CA/CAM) and later devices
37are Intel chips that are a part of
38Intel's '810' chipset for Celeron-based PCs,
39'810E' chipset for Pentium-based PCs, '815E' chipset, and others.
40
41The ICH chips contain at least SEVEN separate PCI functions
42in TWO logical PCI devices.
43An output of lspci will show something similar to the following:
44
45  00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
46  00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
47  00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
48  00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
49  00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
50
51The SMBus controller is function 3 in device 1f.
52Class 0c05 is SMBus Serial Controller.
53
54If you do NOT see the 24x3 device at function 3, and you can't
55figure out any way in the BIOS to enable it,
56(and especially if you have an Asus P4B board),
57see prog/hotplug/README.p4b.
58
59The ICH chips are quite similar to Intel's PIIX4 chip,
60at least in the SMBus controller.
61
62See the file i2c-piix4 for some additional information.
63
64
65Process Call Support
66--------------------
67
68Not supported.
69
70
71I2C Block Read Support
72----------------------
73
74The ICH4 supports a special 3-byte address (command code
75plus 2 more bytes) I2C block read.
76The driver and the kernel i2c protocol stack do not
77support this.
78The ICH5 and higher support a standard 1-byte address (command code)
79I2C block read. The driver does support this.
80
81
82SMBus 2.0 Support
83-----------------
84
85The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
86Kernel and driver support are as follows:
87
88Feature         Kernel          Driver
89Slave mode      no              no
90Host notify     no              no
91Block PEC       yes             yes
92Hardware PEC    yes             yes
93
94
95Other ICH4 and later Features
96-----------------------------
97
98The following additional features are also _not_ supported:
99
10032 Byte buffer
101
102
103**********************
104The lm_sensors project gratefully acknowledges the support of
105Texas Instruments in the initial development of this driver.
106
107The lm_sensors project gratefully acknowledges the support of
108Intel in the development of SMBus 2.0 / ICH4 features of this driver.
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