| 1 | Kernel driver `smsc74m1.o' |
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| 2 | ========================= |
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| 3 | |
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| 4 | Status: Beta. |
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| 5 | |
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| 6 | Supported chips: |
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| 7 | * SMSC 74M1xx Super I/O Controllers |
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| 8 | Addresses scanned: none, address read from Super I/O config space |
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| 9 | Datasheets: |
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| 10 | http://www.smsc.com/main/datasheets/47m10x.pdf |
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| 11 | http://www.smsc.com/main/datasheets/47m120.pdf |
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| 12 | http://www.smsc.com/main/datasheets/47m13x.pdf |
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| 13 | http://www.smsc.com/main/datasheets/47m14x.pdf |
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| 14 | |
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| 15 | Authors: Mark D. Studebaker <mdsxyz123@yahoo.com> |
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| 16 | With assistance from Bruce Allen <ballen@uwm.edu> and his |
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| 17 | fan.c program: http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/ |
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| 18 | |
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| 19 | Module Parameters |
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| 20 | ----------------- |
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| 21 | |
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| 22 | force_addr=0xaddr Set the I/O base address. Useful for boards |
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| 23 | that don't set the address in the BIOS. |
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| 24 | Don't use this unless the driver complains that the |
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| 25 | base address is not set. |
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| 26 | Example: 'modprobe smsc47m1 force_addr=0x680' |
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| 27 | |
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| 28 | |
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| 29 | Description |
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| 30 | ----------- |
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| 31 | |
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| 32 | The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips |
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| 33 | contain monitoring and PWM control circuitry for two fans. |
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| 34 | |
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| 35 | FAN rotation speeds are reported in RPM (rotations per minute). An alarm is |
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| 36 | triggered if the rotation speed has dropped below a programmable limit. FAN |
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| 37 | readings can be divided by a programmable divider (1, 2, 4 or 8) to give |
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| 38 | the readings more range or accuracy. This is important because some FANs |
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| 39 | report only one 'tick' each rotation, while others report two - making |
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| 40 | all readings twice as high. Not all RPM values can accurately be represented, |
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| 41 | so some rounding is done. With a divider of 2, the lowest representable |
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| 42 | value is around 2600 RPM. |
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| 43 | |
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| 44 | PWM values are from 0 to 255. The first value in the /proc entry is |
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| 45 | the pwm value; the second is the enable (0 or 1). |
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| 46 | |
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| 47 | If an alarm triggers, it will remain triggered until the hardware register |
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| 48 | is read at least once. This means that the cause for the alarm may |
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| 49 | already have disappeared! Note that in the current implementation, all |
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| 50 | hardware registers are read whenever any data is read (unless it is less |
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| 51 | than 1.5 seconds since the last update). This means that you can easily |
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| 52 | miss once-only alarms. |
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| 53 | |
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| 54 | |
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| 55 | ********************** |
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| 56 | The lm_sensors project gratefully acknowledges the support of |
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| 57 | Intel in the development of this driver. |
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