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i2c-amd756.c @ 2772

Revision 2772, 11.8 KB (checked in by khali, 9 years ago)
Remove owner from i2c_adapter, restore inc_use and dec_use instead.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`

Line
1	/*
2	amd756.c - Part of lm_sensors, Linux kernel modules for hardware
3	monitoring
4
5	Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
6
7	Shamelessly ripped from i2c-piix4.c:
8
9	Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
10	Philip Edelbrock <phil@netroedge.com>
11
12	This program is free software; you can redistribute it and/or modify
13	it under the terms of the GNU General Public License as published by
14	the Free Software Foundation; either version 2 of the License, or
15	(at your option) any later version.
16
17	This program is distributed in the hope that it will be useful,
18	but WITHOUT ANY WARRANTY; without even the implied warranty of
19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20	GNU General Public License for more details.
21
22	You should have received a copy of the GNU General Public License
23	along with this program; if not, write to the Free Software
24	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25	*/
26
27	/*
28	2002-04-08: Added nForce support. (Csaba Halasz)
29	2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
30	2002-12-28: Rewritten into something that resembles a Linux driver (hch)
31	2003-11-29: Added back AMD8111 removed by the previous rewrite.
32	(Philip Pokorny)
33	2004-02-15: Don't register driver to avoid driver conflicts.
34	(Daniel Rune Jensen)
35	*/
36
37	/*
38	Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
39	Note: we assume there can only be one device, with one SMBus interface.
40	*/
41
42	#include <linux/module.h>
43	#include <linux/pci.h>
44	#include <linux/kernel.h>
45	#include <linux/stddef.h>
46	#include <linux/sched.h>
47	#include <linux/ioport.h>
48	#include <linux/i2c.h>
49	#include <linux/init.h>
50	#include <asm/io.h>
51	#include "version.h"
52
53	#define DRV_NAME "i2c-amd756"
54
55	/* AMD756 SMBus address offsets */
56	#define SMB_ADDR_OFFSET 0xE0
57	#define SMB_IOSIZE 16
58	#define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
59	#define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
60	#define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
61	#define SMB_HOST_DATA (0x6 + amd756_ioport)
62	#define SMB_HOST_COMMAND (0x8 + amd756_ioport)
63	#define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
64	#define SMB_HAS_DATA (0xA + amd756_ioport)
65	#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
66	#define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
67	#define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
68
69	/* PCI Address Constants */
70
71	/* address of I/O space */
72	#define SMBBA 0x058 /* mh */
73	#define SMBBANFORCE 0x014
74
75	/* general configuration */
76	#define SMBGCFG 0x041 /* mh */
77
78	/* silicon revision code */
79	#define SMBREV 0x008
80
81	/* Other settings */
82	#define MAX_TIMEOUT 500
83
84	/* AMD756 constants */
85	#define AMD756_QUICK 0x00
86	#define AMD756_BYTE 0x01
87	#define AMD756_BYTE_DATA 0x02
88	#define AMD756_WORD_DATA 0x03
89	#define AMD756_PROCESS_CALL 0x04
90	#define AMD756_BLOCK_DATA 0x05
91
92
93	static unsigned short amd756_ioport = 0;
94
95	/*
96	SMBUS event = I/O 28-29 bit 11
97	see E0 for the status bits and enabled in E2
98
99	*/
100
101	#define GS_ABRT_STS (1 << 0)
102	#define GS_COL_STS (1 << 1)
103	#define GS_PRERR_STS (1 << 2)
104	#define GS_HST_STS (1 << 3)
105	#define GS_HCYC_STS (1 << 4)
106	#define GS_TO_STS (1 << 5)
107	#define GS_SMB_STS (1 << 11)
108
109	#define GS_CLEAR_STS (GS_ABRT_STS \| GS_COL_STS \| GS_PRERR_STS \| \
110	GS_HCYC_STS \| GS_TO_STS )
111
112	#define GE_CYC_TYPE_MASK (7)
113	#define GE_HOST_STC (1 << 3)
114	#define GE_ABORT (1 << 5)
115
116
117	static int amd756_transaction(void)
118	{
119	int temp;
120	int result = 0;
121	int timeout = 0;
122
123	pr_debug(DRV_NAME
124	": Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
125	inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
126	inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
127
128	/* Make sure the SMBus host is ready to start transmitting */
129	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS \| GS_SMB_STS)) {
130	pr_debug(DRV_NAME ": SMBus busy (%04x). Waiting... \n", temp);
131	do {
132	i2c_delay(1);
133	temp = inw_p(SMB_GLOBAL_STATUS);
134	} while ((temp & (GS_HST_STS \| GS_SMB_STS)) &&
135	(timeout++ < MAX_TIMEOUT));
136	/* If the SMBus is still busy, we give up */
137	if (timeout >= MAX_TIMEOUT) {
138	pr_debug(DRV_NAME ": Busy wait timeout (%04x)\n", temp);
139	goto abort;
140	}
141	timeout = 0;
142	}
143
144	/* start the transaction by setting the start bit */
145	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_HOST_STC, SMB_GLOBAL_ENABLE);
146
147	/* We will always wait for a fraction of a second! */
148	do {
149	i2c_delay(1);
150	temp = inw_p(SMB_GLOBAL_STATUS);
151	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
152
153	/* If the SMBus is still busy, we give up */
154	if (timeout >= MAX_TIMEOUT) {
155	pr_debug(DRV_NAME ": Completion timeout!\n");
156	goto abort;
157	}
158
159	if (temp & GS_PRERR_STS) {
160	result = -1;
161	pr_debug(DRV_NAME ": SMBus Protocol error (no response)!\n");
162	}
163
164	if (temp & GS_COL_STS) {
165	result = -1;
166	printk(KERN_WARNING DRV_NAME ": SMBus collision!\n");
167	}
168
169	if (temp & GS_TO_STS) {
170	result = -1;
171	pr_debug(DRV_NAME ": SMBus protocol timeout!\n");
172	}
173
174	if (temp & GS_HCYC_STS)
175	pr_debug(DRV_NAME ": SMBus protocol success!\n");
176
177	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
178
179	#ifdef DEBUG
180	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
181	pr_debug(DRV_NAME
182	": Failed reset at end of transaction (%04x)\n", temp);
183	}
184
185	pr_debug(DRV_NAME
186	": Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
187	inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
188	inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
189	#endif
190
191	return result;
192
193	abort:
194	printk(KERN_WARNING DRV_NAME ": Sending abort.\n");
195	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_ABORT, SMB_GLOBAL_ENABLE);
196	i2c_delay(100);
197	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
198	return -1;
199	}
200
201	/* Return -1 on error. */
202
203	static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
204	unsigned short flags, char read_write,
205	u8 command, int size, union i2c_smbus_data * data)
206	{
207	int i, len;
208
209	/** TODO: Should I supporte the 10-bit transfers? */
210	switch (size) {
211	/* TODO: proc call is supported, I'm just not sure what to do here... */
212	case I2C_SMBUS_QUICK:
213	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
214	SMB_HOST_ADDRESS);
215	size = AMD756_QUICK;
216	break;
217	case I2C_SMBUS_BYTE:
218	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
219	SMB_HOST_ADDRESS);
220	if (read_write == I2C_SMBUS_WRITE)
221	outb_p(command, SMB_HOST_DATA);
222	size = AMD756_BYTE;
223	break;
224	case I2C_SMBUS_BYTE_DATA:
225	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
226	SMB_HOST_ADDRESS);
227	outb_p(command, SMB_HOST_COMMAND);
228	if (read_write == I2C_SMBUS_WRITE)
229	outw_p(data->byte, SMB_HOST_DATA);
230	size = AMD756_BYTE_DATA;
231	break;
232	case I2C_SMBUS_WORD_DATA:
233	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
234	SMB_HOST_ADDRESS);
235	outb_p(command, SMB_HOST_COMMAND);
236	if (read_write == I2C_SMBUS_WRITE)
237	outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */
238	size = AMD756_WORD_DATA;
239	break;
240	case I2C_SMBUS_BLOCK_DATA:
241	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
242	SMB_HOST_ADDRESS);
243	outb_p(command, SMB_HOST_COMMAND);
244	if (read_write == I2C_SMBUS_WRITE) {
245	len = data->block[0];
246	if (len < 0)
247	len = 0;
248	if (len > 32)
249	len = 32;
250	outw_p(len, SMB_HOST_DATA);
251	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
252	for (i = 1; i <= len; i++)
253	outb_p(data->block[i],
254	SMB_HOST_BLOCK_DATA);
255	}
256	size = AMD756_BLOCK_DATA;
257	break;
258	default:
259	printk
260	(KERN_WARNING "i2c-amd756.o: Unsupported transaction %d\n", size);
261	return -1;
262	}
263
264	/* How about enabling interrupts... */
265	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
266
267	if (amd756_transaction()) /* Error in transaction */
268	return -1;
269
270	if ((read_write == I2C_SMBUS_WRITE) \|\| (size == AMD756_QUICK))
271	return 0;
272
273
274	switch (size) {
275	case AMD756_BYTE:
276	data->byte = inw_p(SMB_HOST_DATA);
277	break;
278	case AMD756_BYTE_DATA:
279	data->byte = inw_p(SMB_HOST_DATA);
280	break;
281	case AMD756_WORD_DATA:
282	data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */
283	break;
284	case AMD756_BLOCK_DATA:
285	data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
286	if(data->block[0] > 32)
287	data->block[0] = 32;
288	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
289	for (i = 1; i <= data->block[0]; i++)
290	data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
291	break;
292	}
293
294	return 0;
295	}
296
297	static void amd756_inc(struct i2c_adapter *adapter)
298	{
299	#ifdef MODULE
300	MOD_INC_USE_COUNT;
301	#endif
302	}
303
304	static void amd756_dec(struct i2c_adapter *adapter)
305	{
306	#ifdef MODULE
307	MOD_DEC_USE_COUNT;
308	#endif
309	}
310
311	static u32 amd756_func(struct i2c_adapter *adapter)
312	{
313	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
314	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
315	I2C_FUNC_SMBUS_BLOCK_DATA \| I2C_FUNC_SMBUS_PROC_CALL;
316	}
317
318	static struct i2c_algorithm smbus_algorithm = {
319	.name = "Non-I2C SMBus adapter",
320	.id = I2C_ALGO_SMBUS,
321	.smbus_xfer = amd756_access,
322	.functionality = amd756_func,
323	};
324
325	struct i2c_adapter amd756_smbus = {
326	.name = "unset",
327	.id = I2C_ALGO_SMBUS \| I2C_HW_SMBUS_AMD756,
328	.algo = &smbus_algorithm,
329	.inc_use = amd756_inc,
330	.dec_use = amd756_dec,
331	};
332
333	enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
334	static const char* chipname[] = {
335	"AMD756", "AMD766", "AMD768",
336	"nVidia nForce", "AMD8111",
337	};
338
339	static struct pci_device_id amd756_ids[] __devinitdata = {
340	{PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 },
341	{PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 },
342	{PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 },
343	{PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 },
344	{PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE },
345	{ 0, }
346	};
347
348	static int __devinit amd756_probe(struct pci_dev *pdev,
349	const struct pci_device_id *id)
350	{
351	int nforce = (id->driver_data == NFORCE);
352	int error;
353	u8 temp;
354
355	if (amd756_ioport) {
356	printk(KERN_ERR DRV_NAME ": Only one device supported. "
357	"(you have a strange motherboard, btw..)\n");
358	return -ENODEV;
359	}
360
361	if (nforce) {
362	if (PCI_FUNC(pdev->devfn) != 1)
363	return -ENODEV;
364
365	pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
366	amd756_ioport &= 0xfffc;
367	} else { /* amd */
368	if (PCI_FUNC(pdev->devfn) != 3)
369	return -ENODEV;
370
371	pci_read_config_byte(pdev, SMBGCFG, &temp);
372	if ((temp & 128) == 0) {
373	printk(KERN_ERR DRV_NAME
374	": Error: SMBus controller I/O not enabled!\n");
375	return -ENODEV;
376	}
377
378	/* Determine the address of the SMBus areas */
379	/* Technically it is a dword but... */
380	pci_read_config_word(pdev, SMBBA, &amd756_ioport);
381	amd756_ioport &= 0xff00;
382	amd756_ioport += SMB_ADDR_OFFSET;
383	}
384
385	if (!request_region(amd756_ioport, SMB_IOSIZE, "amd756-smbus")) {
386	printk(KERN_ERR DRV_NAME
387	": SMB region 0x%x already in use!\n", amd756_ioport);
388	return -ENODEV;
389	}
390
391	#ifdef DEBUG
392	pci_read_config_byte(pdev, SMBREV, &temp);
393	printk(KERN_DEBUG DRV_NAME ": SMBREV = 0x%X\n", temp);
394	printk(KERN_DEBUG DRV_NAME ": AMD756_smba = 0x%X\n", amd756_ioport);
395	#endif
396
397	sprintf(amd756_smbus.name, "SMBus %s adapter at %04x",
398	chipname[id->driver_data], amd756_ioport);
399
400	error = i2c_add_adapter(&amd756_smbus);
401	if (error) {
402	printk(KERN_ERR DRV_NAME
403	": Adapter registration failed, module not inserted.\n");
404	goto out_err;
405	}
406
407	return 0;
408
409	out_err:
410	release_region(amd756_ioport, SMB_IOSIZE);
411	return error;
412	}
413
414
415	static int __init i2c_amd756_init(void)
416	{
417	struct pci_dev *dev;
418	const struct pci_device_id *id;
419
420	printk(KERN_INFO "i2c-amd756.o version %s (%s)\n", LM_VERSION, LM_DATE);
421
422	pci_for_each_dev(dev) {
423	id = pci_match_device(amd756_ids, dev);
424	if (id && amd756_probe(dev, id) >= 0)
425	return 0;
426	}
427
428	return -ENODEV;
429	}
430
431
432	static void __exit i2c_amd756_exit(void)
433	{
434	i2c_del_adapter(&amd756_smbus);
435	release_region(amd756_ioport, SMB_IOSIZE);
436	}
437
438	MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
439	MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
440	MODULE_LICENSE("GPL");
441
442	EXPORT_SYMBOL(amd756_smbus);
443
444	module_init(i2c_amd756_init)
445	module_exit(i2c_amd756_exit)

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