Changeset 4051

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Timestamp:
06/23/06 16:36:15 (2 years ago)
Author:
khali
Message:

i2c-piix4: Drop the fix_hstcfg parameter (2.6 backport)

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  • lm-sensors/trunk/CHANGES

    r4050 r4051  
    1818  Module i2c-piix4: Add ServerWorks HT-1000 support (2.6 backport) 
    1919                    Add ATI IXP200, IXP300, IXP400 support (2.6 backport) 
     20                    Drop the fix_hstcfg parameter (2.6 backport) 
    2021  Module i2c-viapro: Fix compilation with kernels < 2.4.21 
    2122  Module lm83: Add LM82 support (2.6 backport) 

  • lm-sensors/trunk/doc/busses/i2c-piix4

    r4050 r4051  
    2626* force_addr: int 
    2727  Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! 
    28 * fix_hstcfg: int 
    29   Fix config register. Needed on some boards (Force CPCI735). 
    3028 
    3129 
    …… 
    7270and the Victory766 are identical to the PIIX4 in I2C/SMBus support. 
    7371 
    74 A few OSB4 southbridges are known to be misconfigured by the BIOS. In this 
    75 case, you have you use the fix_hstcfg module parameter. Do not use it 
    76 unless you know you have to, because in some cases it also breaks 
    77 configuration on southbridges that don't need it. 
     72If you own Force CPCI735 motherboard or other OSB4 based systems you may need 
     73to change the SMBus Interrupt Select register so the SMBus controller uses 
     74the SMI mode. 
     75 
     761) Use lspci command and locate the PCI device with the SMBus controller: 
     77   00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f) 
     78   The line may vary for different chipsets. Please consult the driver source 
     79   for all possible PCI ids (and lspci -n to match them). Lets assume the 
     80   device is located at 00:0f.0. 
     812) Now you just need to change the value in 0xD2 register. Get it first with 
     82   command: lspci -xxx -s 00:0f.0 
     83   If the value is 0x3 then you need to change it to 0x1 
     84   setpci  -s 00:0f.0 d2.b=1 
     85 
     86Please note that you don't need to do that in all cases, just when the SMBus is 
     87not working properly. 

  • lm-sensors/trunk/kernel/busses/i2c-piix4.c

    r4050 r4051  
    104104                 "EXTREMELY DANGEROUS!"); 
    105105 
    106 static int fix_hstcfg = 0; 
    107 MODULE_PARM(fix_hstcfg, "i"); 
    108 MODULE_PARM_DESC(fix_hstcfg, 
    109                  "Fix config register. Needed on some boards (Force CPCI735)."); 
    110  
    111106static int piix4_transaction(void); 
    112107 
    …… 
    172167 
    173168        pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 
    174  
    175         /* Some BIOS will set up the chipset incorrectly and leave a register 
    176            in an undefined state (causing I2C to act very strangely). */ 
    177         if (temp & 0x02) { 
    178                 if (fix_hstcfg) { 
    179                         printk(KERN_INFO "i2c-piix4.o: Working around buggy " 
    180                                 "BIOS (I2C)\n"); 
    181                         temp &= 0xfd; 
    182                         pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp); 
    183                 } else { 
    184                         printk(KERN_INFO "i2c-piix4.o: Unusual config register " 
    185                                 "value\n"); 
    186                         printk(KERN_INFO "i2c-piix4.o: Try using fix_hstcfg=1 " 
    187                                 "if you experience problems\n"); 
    188                 } 
    189         } 
    190169 
    191170        /* If force_addr is set, we program the new address here. Just to make 
    …… 
    221200 
    222201#ifdef DEBUG 
    223         if ((temp & 0x0E) == 8) 
     202        if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2)) 
    224203                printk(KERN_DEBUG "i2c-piix4.o: Using Interrupt 9 for " 
    225204                        "SMBus.\n");