Changeset 5559 for i2c-tools/trunk/eeprom/decode-dimms
- Timestamp:
- 12/11/08 17:17:02 (3 years ago)
- Files:
-
- 1 modified
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i2c-tools/trunk/eeprom/decode-dimms (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
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i2c-tools/trunk/eeprom/decode-dimms
r5558 r5559 433 433 } 434 434 435 sub value_or_undefined 436 { 437 my ($value, $unit) = @_; 438 return "Undefined!" unless $value; 439 $value .= " $unit" if defined $unit; 440 return $value; 441 } 442 435 443 # Parameter: EEPROM bytes 0-127 (using 3-62) 436 444 sub decode_sdr_sdram($) … … 495 503 printl("Number of Col Address Bits", $temp); 496 504 497 if ($bytes->[5] == 0) { $temp = "Undefined!"; } 498 else { $temp = $bytes->[5]; } 499 printl("Number of Module Rows", $temp); 505 printl("Number of Module Rows", value_or_undefined($bytes->[5])); 500 506 501 507 if ($bytes->[7] > 1) { $temp = "Undefined!"; } … … 535 541 else { $temp = "No Bank2 OR Bank2 = Bank1 width"; } 536 542 printl("Primary SDRAM Component Bank Config", $temp); 537 538 $temp = $bytes->[13] & 0x7f; 539 if ($temp == 0) { $temp = "Undefined!"; } 540 printl("Primary SDRAM Component Widths", $temp); 543 printl("Primary SDRAM Component Widths", 544 value_or_undefined($bytes->[13] & 0x7f)); 541 545 542 546 if ($bytes->[14] > 126) { $temp = "Bank2 = 2 x Bank1"; } 543 547 else { $temp = "No Bank2 OR Bank2 = Bank1 width"; } 544 548 printl("Error Checking SDRAM Component Bank Config", $temp); 545 546 $temp = $bytes->[14] & 0x7f; 547 if ($temp == 0) { $temp = "Undefined!"; } 548 printl("Error Checking SDRAM Component Widths", $temp); 549 550 if ($bytes->[15] == 0) { $temp = "Undefined!"; } 551 else { $temp = $bytes->[15]; } 552 printl("Min Clock Delay for Back to Back Random Access", $temp); 549 printl("Error Checking SDRAM Component Widths", 550 value_or_undefined($bytes->[14] & 0x7f)); 551 552 printl("Min Clock Delay for Back to Back Random Access", 553 value_or_undefined($bytes->[15])); 553 554 554 555 my @array; … … 561 562 printl("Supported Burst Lengths", $temp); 562 563 563 if ($bytes->[17] == 0) { $temp = "Undefined/Reserved!"; } 564 else { $temp = $bytes->[17]; } 565 printl("Number of Device Banks", $temp); 564 printl("Number of Device Banks", 565 value_or_undefined($bytes->[17])); 566 566 567 567 printl("Supported CAS Latencies", cas_latencies(@cas)); … … 653 653 printl("SDRAM Device Attributes (General)", $temp); 654 654 655 if ($bytes->[27] == 0) { $temp = "Undefined!"; } 656 else { $temp = "$bytes->[27] ns"; } 657 printl("Minimum Row Precharge Time", $temp); 658 659 if ($bytes->[28] == 0) { $temp = "Undefined!"; } 660 else { $temp = "$bytes->[28] ns"; } 661 printl("Row Active to Row Active Min", $temp); 662 663 if ($bytes->[29] == 0) { $temp = "Undefined!"; } 664 else { $temp = "$bytes->[29] ns"; } 665 printl("RAS to CAS Delay", $temp); 666 667 if ($bytes->[30] == 0) { $temp = "Undefined!"; } 668 else { $temp = "$bytes->[30] ns"; } 669 printl("Min RAS Pulse Width", $temp); 655 printl("Minimum Row Precharge Time", 656 value_or_undefined($bytes->[27], "ns")); 657 658 printl("Row Active to Row Active Min", 659 value_or_undefined($bytes->[28], "ns")); 660 661 printl("RAS to CAS Delay", 662 value_or_undefined($bytes->[29], "ns")); 663 664 printl("Min RAS Pulse Width", 665 value_or_undefined($bytes->[30], "ns")); 670 666 671 667 $temp = "";
